{"title":"An advanced instruction folding mechanism for a stackless Java processor","authors":"A. Kim, J. M. Chang","doi":"10.1109/ICCD.2000.878343","DOIUrl":null,"url":null,"abstract":"In order to improve the execution speed of Java in hardware, a new advanced instruction folding technique has been developed. In this paper an instruction folding scheme based on an advanced Producer, Operator and Consumer (POC) model is proposed and demonstrates improvement in bytecode execution over the existing techniques. The proposed POC model is able to detect and fold all possible instruction sequence types dynamically in hardware, including a sequence that is separated by other bytecode instructions. SPEC JMV98 benchmark results show that the proposed POC model-based folder can save more than 90% of folding operations. In this research, the proposed instruction folding technique can eliminate most of the stack operations and the use of a physical operand stack, and can thereby achieve the performance of high-end RISC processors.","PeriodicalId":437697,"journal":{"name":"Proceedings 2000 International Conference on Computer Design","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2000 International Conference on Computer Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2000.878343","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In order to improve the execution speed of Java in hardware, a new advanced instruction folding technique has been developed. In this paper an instruction folding scheme based on an advanced Producer, Operator and Consumer (POC) model is proposed and demonstrates improvement in bytecode execution over the existing techniques. The proposed POC model is able to detect and fold all possible instruction sequence types dynamically in hardware, including a sequence that is separated by other bytecode instructions. SPEC JMV98 benchmark results show that the proposed POC model-based folder can save more than 90% of folding operations. In this research, the proposed instruction folding technique can eliminate most of the stack operations and the use of a physical operand stack, and can thereby achieve the performance of high-end RISC processors.