Partitioning analog and digital processing in a single-chip GPS receiver

Abstract

In the near future, Global Positioning System (GPS) data will be used in a wide variety of portable, mobile electronic devices. Shrinking feature sizes, combined with the need for low-power, lightweight components, will drive an entire GPS receiver onto a single, mixed-signal die. A major design issue in mixed-signal systems is the effect of digital switching noise coupled to sensitive analog circuits through the substrate. A method is proposed for minimizing this effect by partitioning digital and analog processing into separate time blocks. The resulting trade-off between lost signal and increased energy consumption is explored. In particular, a GPS synchronizer design is analyzed with respect to modifications that can be made to increase performance, while minimizing any associated energy penalty.