{"title":"High speed and wide tuning range voltage-controlled ring oscillator in 0.18µm CMOS","authors":"Y. Tiao, Meng-Lieh Sheu, L. Tsao","doi":"10.1109/ISNE.2010.5669187","DOIUrl":null,"url":null,"abstract":"A differential delay cell with complementary current control to extend the control voltage range as well as the operation frequency is proposed for high speed and wide tuning range voltage-controlled ring oscillator (VCRO). The complementary current control mitigates the restriction that control voltage can not operate at full range in a conventional VCRO. A three-stage VCRO is constructed for verifying the proposed differential delay cell. The VCRO is implemented using 0.18-µm 1P6M CMOS process and 1.8V supply voltage. Measured results show that a wide operation frequency range from 8.36GHz to 1.29GHz is achieved for the full range control voltage from 0V to 1.8V. The measured phase noise is −105.59dBc/Hz at 1MHz offset from the 8.35GHz centre frequency and a figure of merit (FOM) is −165.3 dBc/Hz. The core area is 106µm×76.2µm.","PeriodicalId":412093,"journal":{"name":"2010 International Symposium on Next Generation Electronics","volume":"927 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Symposium on Next Generation Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2010.5669187","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A differential delay cell with complementary current control to extend the control voltage range as well as the operation frequency is proposed for high speed and wide tuning range voltage-controlled ring oscillator (VCRO). The complementary current control mitigates the restriction that control voltage can not operate at full range in a conventional VCRO. A three-stage VCRO is constructed for verifying the proposed differential delay cell. The VCRO is implemented using 0.18-µm 1P6M CMOS process and 1.8V supply voltage. Measured results show that a wide operation frequency range from 8.36GHz to 1.29GHz is achieved for the full range control voltage from 0V to 1.8V. The measured phase noise is −105.59dBc/Hz at 1MHz offset from the 8.35GHz centre frequency and a figure of merit (FOM) is −165.3 dBc/Hz. The core area is 106µm×76.2µm.