Efficiency Optimized Design Procedure of low-Q LLC Resonant Converter for Wide Input Voltage and Load Range Application

A. Awasthi, Snehal Bagawade, Amit Kumar, P. Jain
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引用次数: 2

Abstract

LLC resonant dc-dc converter has become a de-facto resonant topology in many emerging industrial applications. This paper proposes a simple to implement design approach for LLC dc-dc resonant converter suitable for operation under wide input voltage and load range for fixed output voltage applications. For such applications, selecting a design with low inductance ratio (K) and high-quality factor (Q) ensures narrow switching frequency variation but at the cost of efficiency and power density. However, maximizing power efficiency throughout the required range of line and load conditions with output voltage regulation requires optimal selection of K and Q. The proposed design approach is compared with two other existing design approaches and tested on an experimental prototype of 300W LLC converter for 2:1 input voltage range (20-40V). The proposed design shows rated efficiency improvement of 3% over existing methods.
适用于宽输入电压和负载范围的低q LLC谐振变换器的效率优化设计方法
LLC谐振dc-dc变换器已经成为许多新兴工业应用中事实上的谐振拓扑结构。本文提出了一种易于实现的LLC dc-dc谐振变换器设计方法,适用于宽输入电压和固定输出电压的负载范围。对于此类应用,选择具有低电感比(K)和高质量因数(Q)的设计可确保开关频率变化窄,但以效率和功率密度为代价。然而,在输出电压调节所需的线路和负载条件范围内,最大限度地提高功率效率需要K和q的最佳选择。本文将所提出的设计方法与其他两种现有设计方法进行了比较,并在300W LLC变换器2:1输入电压范围(20-40V)的实验样机上进行了测试。与现有方法相比,该设计的额定效率提高了3%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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