FDSOI Floating Body Cell eDRAM Using Gate-Induced Drain-Leakage (GIDL) Write Current for High Speed and Low Power Applications

S. Puget, G. Bossu, C. Fenouiller-Beranger, P. Perreau, P. Masson, P. Mazoyer, P. Lorenzini, J. Portal, R. Bouchakour, T. Skotnicki
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引用次数: 10

Abstract

A Capacitorless IT-DRAM cell using gate-induced drain leakage (GIDL) current for write operation was demonstrated for the first time on FDSOI substrate, 9.5 nm silicon film and 19 nm BOX. 20 nm gate scaling improves 20% memory effect amplitude. GIDL mechanism allows low bias, low power, fast write time and does not affect intrinsic retention time. A similar value of 10 ms at 85degC is obtained like for impact ionization (II) optimised devices.
采用栅极感应漏漏(GIDL)写电流的FDSOI浮体单元eDRAM用于高速低功耗应用
首次在FDSOI衬底、9.5 nm硅膜和19 nm BOX上展示了一种采用栅极诱发漏极(GIDL)电流进行写入操作的无电容IT-DRAM电池。20nm栅极缩放提高了20%的记忆效应幅度。GIDL机制允许低偏置、低功耗、快速写入时间和不影响内在保持时间。与冲击电离(II)优化装置一样,在85℃下获得了类似的10 ms值。
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