A selector-based FFT processor and its FPGA implementation

Yuya Hirai, Kazushi Kawamura, M. Yanagisawa, N. Togawa
{"title":"A selector-based FFT processor and its FPGA implementation","authors":"Yuya Hirai, Kazushi Kawamura, M. Yanagisawa, N. Togawa","doi":"10.1109/ISOCC.2017.8368783","DOIUrl":null,"url":null,"abstract":"Fast Fourier transform (FFT) is used in various applications such as signal processings and developing a high-speed FFT processor is quite required. In this paper, we propose a high-speed FFT processor based on selector logics. The selector-based FFT processor is constructed by focusing on the subtract-multiplication operations and partly applying selector logics to them. Furthermore, we implement the selector-based FFT processor on a Xilinx FPGA. Experimental results show that our proposed FFT processor can improve the processing speed by up to 21% and also reduce the number of LUTs by up to 33% compared with a naive FFT processor.","PeriodicalId":248826,"journal":{"name":"2017 International SoC Design Conference (ISOCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC.2017.8368783","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Fast Fourier transform (FFT) is used in various applications such as signal processings and developing a high-speed FFT processor is quite required. In this paper, we propose a high-speed FFT processor based on selector logics. The selector-based FFT processor is constructed by focusing on the subtract-multiplication operations and partly applying selector logics to them. Furthermore, we implement the selector-based FFT processor on a Xilinx FPGA. Experimental results show that our proposed FFT processor can improve the processing speed by up to 21% and also reduce the number of LUTs by up to 33% compared with a naive FFT processor.
基于选择器的FFT处理器及其FPGA实现
快速傅里叶变换(FFT)在信号处理等领域有着广泛的应用,开发高速FFT处理器是非常必要的。本文提出了一种基于选择器逻辑的高速FFT处理器。基于选择器的FFT处理器是通过关注减法-乘法运算并部分应用选择器逻辑来构建的。此外,我们在Xilinx FPGA上实现了基于选择器的FFT处理器。实验结果表明,与原始FFT处理器相比,我们提出的FFT处理器可以将处理速度提高21%,并将lut数量减少33%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信