1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS

Abstract

We have formed heterogeneous oxide semiconductor FETs (OSFETs) in one planar FET layer and two vertical FET (VFET) layers over Si by monolithically stacking OSFETs on top of Si CMOS. Formation of IOSIC DRAM memory cells in the VFET layers and a primary sense amplifier (1st SA) in the planar FET layer has realized a memory with different functions such as memory switching and signal amplification in different layers for the first time. As a result, special features, which are three-dimensional monolithic stacking of memory and long date retention, are implemented.