Application Specific OEICs Fabricated Using GaAs IC Foundry Services

Abstract

A novel epitaxy-on-electronics process for fabricating optoelectronic integrated circuits (OEICs) with high performance optoelectronic devices monolithically integrated with VLSI density and complexity GaAs electronic circuitry has been proposed, demonstrated, and continues to be developed by a research team1 at MIT associated with the ARPA-funded National Center for Integrated Photonics Technology (NCIPT)' and working in collaboration with other researchers at Caltech3, GTE Labs Inc.4, MIT Lincoln Laboratory5, Motorola, Inc.6, and Vitesse Semiconductor Corp.7. Building on the existing commercial gallium arsenide integrated circuit technology base, this epi-on-electronics approach does not require t'he development of a VLSI electronics technology, unlike the more common epitaxy-first approach. It thus promises to provide a direct, immediate route to the realization of large-scale application-specific OEICs for a variety of applications. Recent work by researchers at MIT has shown that gallium arsenide MESFETs fabricated using commercial VLSI processes incorporating refractory metal ohmic contacts and gates, and standard (Si IC-like) back-end multi-level dielectric and interconnect technology, are not adversely effected by several hours at elevated temperatures*. This means that these devices will survive the molecular beam epitaxy growth sequence for many 111-V optoelectronic device heterostructures. In fact, these MESFETs still function after being annealed at as high as 700"C, but as Figure 1 illustrates, the room temperature characteristics change for anneals above 500°C. Thus if established design rules and simulation tools are to be used, the bulk of the epitaxial growth run must be conducted at 500°C or less.