Prediction of phase noise in CMOS distributed oscillators

Jing Zhang, Haitao Mei, T. Kwasniewski
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引用次数: 7

Abstract

This paper presents a frequency-domain analytical method for predicting the phase noise in distributed oscillators. The method is based upon a first-order linear model, which is then augmented with the nonlinear effects. Closed form formulae are derived for predicting the distributed oscillator phase noise which contributes from the additive noise and mixing (intermodulation) noise. The principal issues related to phase noise are discussed. Harmonic balance (HB) simulation in advanced design system (ADS) is used to ascertain the accuracy of the phase noise predictions. It is found that the theoretical conclusions are in a good agreement with the phase noise observed in the simulation, which in turn is within acceptable limits. In five test cases, namely, three 4-stage distributed oscillators operating at the three different frequencies and two distributed oscillators in 4-stage and 5-stage respectively operating at the same frequency, the maximum calculated/simulated phase noise error is about 5.0 dBc/Hz at 1MHz offset from the carrier.
CMOS分布振荡器相位噪声的预测
本文提出了一种预测分布式振荡器相位噪声的频域分析方法。该方法基于一阶线性模型,然后加入非线性效应。推导了由加性噪声和混频(互调)噪声引起的分布式振荡器相位噪声的封闭公式。讨论了与相位噪声有关的主要问题。利用先进设计系统(ADS)中的谐波平衡(HB)仿真来验证相位噪声预测的准确性。理论结论与仿真中观测到的相位噪声符合较好,在可接受的范围内。在5个测试用例中,即3个4级分布振荡器工作在3个不同频率,2个4级和5级分布振荡器分别工作在同一频率,在距载波1MHz偏移处,计算/模拟的最大相位噪声误差约为5.0 dBc/Hz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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