Modeling of substrate noise injected by digital libraries

Abstract

Switching noise is one of the major sources of timing errors and functional hazards in logic circuits. It is caused by the cumulative effect of microscopic spurious currents arising in all devices during logic transitions. These currents are injected into the substrate and in supply lines, resulting in significant ripple noise. Individually, such micro-currents do not usually cause catastrophic failures. However, cumulatively, they can impact power supply and substrate potential across the chip. Thus, the electrical behavior of sensitive digital and analog circuits can be significantly changed, hence limiting circuit performance. The analysis of switching noise at a macroscopic level requires one to accurately compute models for all microscopic spurious currents, known as noise signatures. The challenge is to simultaneously account for a myriad of parameters and their process variations in a compact and accurate model. To address this problem, a new methodology based on response surface methodology and orthogonal polynomial approximation is proposed. Experimental results on a 0.35 /spl mu/m library show that the methodology is capable of accurately approximating noise signatures with a single analytical formula. A library of such formulae has been created and it is being used to accurately characterize switching noise at the macroscopic level.