First Demonstration of BEOL-Compatible Ultrathin AtomicLayer-Deposited InZnO Transistors with GHz Operation and Record High Bias-Stress Stability

Abstract

This work reports for the first time ultrathin atomic-layer-deposited (ALD) InZnO as a novel back-end-of line (BEOL) channel material for monolithic 3D integration. By tuning the ratio of In to Zn with ALD cycles, InZnO transistors with 3.5 nm channel thickness can achieve excellent subthreshold swings (SS) as low as 65 mV/dec, high on-off current ratio up to $10 ^{11}$, and sizeable on-current density (ION) up to 1.33 A/mm for In-rich channels at 100 nm channel length with drain voltage (VDS) of 1 V. A surprising high degree of stability under large positive gate bias stress (statistically measured threshold voltage shift $\Delta \mathrm{V}_{T}$ of -16 mV after 1500 s stress with gate voltage bias (VBias) of 3.5 V) is observed in the In:Zn $=1$:1 case. ALD process resolves the long-time concern on the stability of sputtered InZnO films as the channels without Ga doping. A charge-neutrality-level (CNL) alignment and trap generation model is proposed to explain this unique phenomenon of negligible VT shift under positive gate bias stress (PBS). Finally, ground-signal-ground (GSG) structures are also fabricated to investigate the RF performance of these BEOL-compatible transistors with GHz operation frequencies.