F. Rivet, Y. Deval, J. Bégueret, D. Dallet, D. Belot
{"title":"A Disruptive Software-Defined Radio Receiver Architecture Based on Sampled Analog Signal Processing","authors":"F. Rivet, Y. Deval, J. Bégueret, D. Dallet, D. Belot","doi":"10.1109/RFIC.2007.380864","DOIUrl":null,"url":null,"abstract":"Software defined radio (SDR) aims at bringing digital treatment chip closer to the antenna in a mobile terminal architecture. The main goal is to create a re-configurable radio architecture accepting all the cellular or non-cellular standards working in the 0-5 GHz frequency range. But, in this environment, the analog to digital conversion and the digital operations face issues like power supply and processing speed. The idea is to interface a preprocessing circuit between the antenna and a digital signal processor (DSP) to pre-condition the RF signal. This paper presents the design of an analog discrete-time device located between antenna and a DSP in standard radio architecture. It uses the principle of the discrete Fourier transform (DFT) to reduce the frequency of the DSP-input-signal treatment to fulfil the SDR purpose. It has been validated through system level simulation.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2007.380864","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21
Abstract
Software defined radio (SDR) aims at bringing digital treatment chip closer to the antenna in a mobile terminal architecture. The main goal is to create a re-configurable radio architecture accepting all the cellular or non-cellular standards working in the 0-5 GHz frequency range. But, in this environment, the analog to digital conversion and the digital operations face issues like power supply and processing speed. The idea is to interface a preprocessing circuit between the antenna and a digital signal processor (DSP) to pre-condition the RF signal. This paper presents the design of an analog discrete-time device located between antenna and a DSP in standard radio architecture. It uses the principle of the discrete Fourier transform (DFT) to reduce the frequency of the DSP-input-signal treatment to fulfil the SDR purpose. It has been validated through system level simulation.