Low voltage low power pipelined ADC for video applications

Abstract

In today's world application of battery powered analog and mixed mode electronic device requires designing analog circuit to operate at low voltage levels. There are many issues which are involved in implementing low voltage circuits such as reduced noise immunity, greater delay and poor linearity. There is a need to use certain MOSFET techniques so that the MOSFET can be used even in sub-threshold region without any significant change in its performance. Certain techniques have been put forward corresponding to low voltage analog circuits using CMOS Technology to be used in variety of applications. Accordingly we propose to design a 10 bits 30Msample/s CMOS Analog to Digital Converter (ADC) using a 1.5-bits/stage pipeline architecture for high speed signal processing to be used in video related applications