Off-chip delta-I noise modeling and measurement methodology

Abstract

This paper describes an electrical modeling and measurement methodology for high-speed simultaneous switching noise generated by off-chip drivers. It details the study of package parasitic effects on the component electrical performance in a functional system environment. Critical design parameter curves are generated and correlated with hardware measurements under an actual system environment. A novel measurement technique is also described which facilitates the understanding of the modeling results for the integrated system. Actual hardware measurements of state-of-the-art PowerPC/sup TM/ microprocessor designs are used to justify the modeling technique.