A new CMOS structure for low temperature operation with forward substrate bias

Abstract

A CMOS structure with a local well contact that allows the application of forward substrate bias for both p- and n-well with a single substrate supply is described. Higher driving capability and smaller short channel effects can be realized without device area increase. A propagation delay of 95 ps/stage at V/sub dd/=1.5 V and a temperature of 77 K was obtained with a 0.4- mu m gate length, which is about 1.5 times faster than that of the conventional CMOS structure.<>