1.27Gb/s/pin 3mW/pin wireless superconnect (WSC) interface scheme

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-07-23 DOI:10.1109/ISSCC.2003.1234260

K. Kanda, D. Antono, K. Ishida, H. Kawaguchi, T. Kuroda, T. Sakurai

引用次数: 131

Abstract

A low-power high-speed chip-to-chip interface scheme is described having a density of 625pins/mm/sup 2/. The interface utilizes capacitively coupled contactless minipads, return-to-half-V/sub 00/ signaling and sense amplifying F/F. The measured test chip fabricated in 0.35/spl mu/m CMOS delivers up to 1.27Gb/s/pin at 3mW/pin.

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1.27Gb/s/pin 3mW/pin无线超级连接(WSC)接口方案

描述了一种低功耗高速片对片接口方案，其密度为625pin /mm/sup 2/。该接口采用电容耦合的非接触式微型板，回半v /sub /信号和感测放大F/F。测量的测试芯片采用0.35/spl μ m CMOS制造，在3mW/引脚下提供高达1.27Gb/s/引脚。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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