{"title":"A High Input Impedance Low Noise Analog Front-End Chip for Neural Signal Applications","authors":"Fan Wu, Yanping Ji, Wensi Wang","doi":"10.1109/ASID56930.2022.9995938","DOIUrl":null,"url":null,"abstract":"A Capacitive Feedback Programmable Gain Instrumentation Amplifier (CFPGA) with input impedance boosting technique is proposed. Compared with traditional methods, the proposed negative capacitance programmable circuit can achieve higher input impedance without injecting current into human biopotential electrodes. Simulation results using TSMC's 180 nm CMOS technology show that the proposed input impedance boosting technique can achieve an input impedance higher than 1G. In addition, CFPGA can achieve 1–128 times of 7bit gain adjustable. The entire CFPGA achieves an input-equivalent noise density equal to $\\mathbf{29}\\ \\mathbf{nV}/\\sqrt{\\mathbf{Hz}}$ at a supply voltage of 1.8V.","PeriodicalId":183908,"journal":{"name":"2022 IEEE 16th International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 16th International Conference on Anti-counterfeiting, Security, and Identification (ASID)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASID56930.2022.9995938","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A Capacitive Feedback Programmable Gain Instrumentation Amplifier (CFPGA) with input impedance boosting technique is proposed. Compared with traditional methods, the proposed negative capacitance programmable circuit can achieve higher input impedance without injecting current into human biopotential electrodes. Simulation results using TSMC's 180 nm CMOS technology show that the proposed input impedance boosting technique can achieve an input impedance higher than 1G. In addition, CFPGA can achieve 1–128 times of 7bit gain adjustable. The entire CFPGA achieves an input-equivalent noise density equal to $\mathbf{29}\ \mathbf{nV}/\sqrt{\mathbf{Hz}}$ at a supply voltage of 1.8V.