A High Input Impedance Low Noise Analog Front-End Chip for Neural Signal Applications

Fan Wu, Yanping Ji, Wensi Wang
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引用次数: 0

Abstract

A Capacitive Feedback Programmable Gain Instrumentation Amplifier (CFPGA) with input impedance boosting technique is proposed. Compared with traditional methods, the proposed negative capacitance programmable circuit can achieve higher input impedance without injecting current into human biopotential electrodes. Simulation results using TSMC's 180 nm CMOS technology show that the proposed input impedance boosting technique can achieve an input impedance higher than 1G. In addition, CFPGA can achieve 1–128 times of 7bit gain adjustable. The entire CFPGA achieves an input-equivalent noise density equal to $\mathbf{29}\ \mathbf{nV}/\sqrt{\mathbf{Hz}}$ at a supply voltage of 1.8V.
一种用于神经信号应用的高输入阻抗低噪声模拟前端芯片
提出了一种采用输入阻抗增强技术的电容反馈可编程增益仪表放大器(CFPGA)。与传统方法相比,所提出的负电容可编程电路可以在不向人体生物电位电极注入电流的情况下实现更高的输入阻抗。采用台积电180 nm CMOS技术的仿真结果表明,所提出的输入阻抗提升技术可以实现高于1G的输入阻抗。此外,CFPGA可以实现1-128倍的7bit增益可调。在电源电压为1.8V时,整个CFPGA的输入等效噪声密度为$\mathbf{29}\ \mathbf{nV}/\sqrt{\mathbf{Hz}}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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