A SONOS Nonvolatile Memory Cell For Semiconductor Disk Application

M. French, H. Sathianathan, M. White
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引用次数: 8

Abstract

AbstracG A SONOS EEPROM array with a true 5 volt programming voltage is proposed. An analytical expression for the change in threshold voltage as a function of time is derived as a guideline for scaling the SONOS nonvolatile memory element. An improved nonvolatile memory transistor is obtained by decreasing the tunnel oxide thickness for 20A to 18A and increasing the nitride trap density. With further reduction of the tunnel oxide thickness from 18A to 1IA , the crossover time (intersection of the erase/write curves) is improved from 60 ms to 3 ms.
半导体磁盘用SONOS非易失性存储单元
提出了一种具有真5伏编程电压的SONOS EEPROM阵列。导出了阈值电压随时间变化的解析表达式,作为缩放SONOS非易失性存储器元件的指导方针。通过减小20A至18A的隧道氧化物厚度和增加氮化物陷阱密度,得到了一种改进的非易失性存储器晶体管。随着隧道氧化物厚度从18A进一步降低到1IA,交叉时间(擦除/写入曲线的交集)从60 ms提高到3 ms。
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