Fault tolerant multicube pipeline processor

H. Mori, M. Uehara
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引用次数: 1

Abstract

This paper describes the architecture of fault tolerant pipeline processors. It uses multicube interconnection and voting based on cell reliability. Our architecture, featuring majority voting of results and reliability assessment to cells, ensures higher performance over conventional approaches in fault tolerance.<>
容错多管管线处理器
本文描述了容错流水线处理器的体系结构。它采用多管互连和基于小区可靠性的投票。我们的架构,以结果的多数投票和对单元的可靠性评估为特色,确保在容错方面比传统方法具有更高的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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