{"title":"Implementation of a Temperature Monitoring Interface Circuit for PowerPC systems","authors":"H. Chiueh, J. Choma, J. Draper","doi":"10.1109/MWSCAS.2000.951595","DOIUrl":null,"url":null,"abstract":"A Temperature Monitoring Interface Circuit for PowerPC systems has been designed, implemented, and tested. This design yields a suitable balance of hardware and software components in the Integrated Thermal Management (ITEM) System. Powerview and Lager tools were used to design this chip in one man-month. This circuit was fabricated in an HP 0.5 /spl mu/m single-poly 3-metal process through MOSIS. Laboratory testing agreed with simulation results in verifying the functionality and performance of this circuit to 50 MHz, which is the targeted system speed of the ITEM multi-node computer system.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.951595","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A Temperature Monitoring Interface Circuit for PowerPC systems has been designed, implemented, and tested. This design yields a suitable balance of hardware and software components in the Integrated Thermal Management (ITEM) System. Powerview and Lager tools were used to design this chip in one man-month. This circuit was fabricated in an HP 0.5 /spl mu/m single-poly 3-metal process through MOSIS. Laboratory testing agreed with simulation results in verifying the functionality and performance of this circuit to 50 MHz, which is the targeted system speed of the ITEM multi-node computer system.