{"title":"Drift Speed Adaptive Memristor SPICE Model Implementation and Applications in Logic Circuits","authors":"Genglei Zhu, Zefeng Zhang, Wenya Li, Lilian Huang","doi":"10.1109/ICCS56666.2022.9936317","DOIUrl":null,"url":null,"abstract":"This paper presents a drift velocity adaptive memristor SPICE model, which can match different kinds of physical memristor equipment and experimental memristor data by adjusting its own parameters. Mathematical model of a novel memristor device is first introduced in this paper, then four different memristor devices are matched by adjusting parameters of the proposed memristor with maximum average error is only 6.24%. This model is flexible, highly functional and accurate, it can show all the behaviors of resistance random access memory (RRAM), which plays a crucial role in memory and logic design. In addition, we use the two proposed memristor models connected anti-serially to capture an ideal I-V relationship of complementary resistive switch (CRS). Finally, comprehensive comparison and discussion between the model proposed and the existing models from several different levels are carried out. The results prove that the model has potential application in memory and logic design.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS56666.2022.9936317","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a drift velocity adaptive memristor SPICE model, which can match different kinds of physical memristor equipment and experimental memristor data by adjusting its own parameters. Mathematical model of a novel memristor device is first introduced in this paper, then four different memristor devices are matched by adjusting parameters of the proposed memristor with maximum average error is only 6.24%. This model is flexible, highly functional and accurate, it can show all the behaviors of resistance random access memory (RRAM), which plays a crucial role in memory and logic design. In addition, we use the two proposed memristor models connected anti-serially to capture an ideal I-V relationship of complementary resistive switch (CRS). Finally, comprehensive comparison and discussion between the model proposed and the existing models from several different levels are carried out. The results prove that the model has potential application in memory and logic design.