Low power current mode multi-valued logic interconnect for high speed interchip communications

J.Q. Zhang, S. Long, F.H. Ho, J. K. Madsen
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引用次数: 7

Abstract

A new GaAs current mode (CM) chip-to-chip interconnection circuit is presented that provides high signal transfer speed with a 50 /spl Omega/ active termination and reduced input voltage swing. The power dissipation is shown to be 1/8 of an ECL I/O. The ternary logic version of it can reduce wiring by half and eliminate clock skew problems while still keeping the low power dissipation.
用于高速片间通信的低功率电流模式多值逻辑互连
提出了一种新的GaAs电流模式(CM)芯片间互连电路,该电路以50 /spl ω /有源端端提供高信号传输速度,并减小了输入电压摆幅。功耗显示为ECL I/O的1/8。它的三元逻辑版本可以减少一半的布线,消除时钟倾斜问题,同时仍然保持低功耗。
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