Current Collapse-Free Vertical Submicron Channel GaN-based Transistors with InAlGaN Quaternary Alloy Contact Layers

Abstract

A GaN-based vertical transistor with good pinch-off characteristics at submicron channel is presented. An InAlGaN quaternary alloy contact layer on the top of the small post which serves non-alloy ohmic contact with WSi electrode, while virtually no current flows on a conventional n-GaN contact layer. A gate electrode is formed in a self-aligned manner using the overhang of the WSi contact as a mask. The fabricated vertical device does not exhibit current collapse which is commonly observed in planer AlGaN/GaN heterojunction transistors. Fig. 1 shows detailed schematic cross section of the fabricated vertical transistor. The epitaxial n-InAlGaN/ni-GaN/n+-GaN structure is grown on c-plane sapphire by metal organic chemical vapor deposition (MOCVD) technique. The Si doping concentration of the ni-GaN layer is in the order of 1017cm-3. The composition of the InAlGaN is chosen to be lattice matched to the underlying GaN. The InAlGaN alloy can serve non-alloy ohmic contacts due to its extremely low specific contact resistances originated from its large electron affinity [1]. After formation of the submicron epitaxial post by using the WSi electrode as a mask, PdSi gate electrode is formed in a self-aligned manner. The channel width is reduced down to 0.3ptm which can serve good pinch-off characteristics [2]. Bottom ohmic electrode is formed on the selectively exposed n+-GaN. The cross section and bird's view of the fabricated transistor observed by scanning electron microscope (SEM) are shown in Fig. 2, in which successful formation of the self-aligned gate is confirmed. Fig.3 shows typical drain current-voltage characteristics for 100ptm channel length device demonstrating working vertical transistor with good pinch-off characteristics. The obtained maximum lds at 1OV of Vd, is 240mA/mm corresponding to the high current density of 8OkA/cm2. The current density is almost one order of magnitude higher than that of conventional GaN-based planer device. The current-voltage characteristics between WSi ohmic and the gate exhibits good Schottky rectifying one with very low reverse leakage current as shown in Fig.4. The WSi contact exhibits good ohmic characteristics on the InAlGaN as shown in Fig.5, while no current flows on n-GaN. The obtained specific contact resistance of WSi on InAlGaN is 3.5x 10-5Qcm2. In addition to the high current density and small device size, vertical device configuration is also expected to be advantageous for suppressing the so-called current collapse because most of the channel region is not exposed on the surface and thus would not be affected by the surface traps. The current collapse is the phenomena in which drain current is collapsed after high drain bias is applied. In order to examine it, pulsed current-voltage characteristics are measured varying the maximum Vd, as shown in Fig.6 comparing the source-up and drain-up configurations. The used pulse width is 80isec. The applied maximum drain voltage is higher for the source-up device than for the drain-up one, because the drain breakdown voltage is higher for the source-up configuration. Note that the measured devices do not have any passivation dielectrics, so that large numbers of surface traps are expected. The characteristics are not changed by the variation of the maximum drain bias for both source-up and drain-up configuration implying the collapse-free operation. In conclusion, vertical submicron channel GaN-based transistor with InAlGaN contact layer is demonstrated. The InAlGaN contact layer serves non-alloy ohmic with WSi electrode which is used as a mask for the following self-aligned gate formation. Operation of the GaN-based vertical transistor with submicron channel is confirmed for the first time to the best of our knowledge with very high current density of 8OkA/cm2. The vertical device enables its collapse-free operation by reducing the exposed surface area.