A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs

Yuji Osaki, T. Hirose, N. Kuroki, M. Numa
{"title":"A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs","authors":"Yuji Osaki, T. Hirose, N. Kuroki, M. Numa","doi":"10.1109/ESSCIRC.2011.6044899","DOIUrl":null,"url":null,"abstract":"A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit has a distinctive feature in current generation scheme with logic error correction circuit by detecting input and output logic levels. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achieves low-power operation because it dissipates operating current only when the input signals change. Measurement results demonstrated that the circuit can convert low-voltage input signals of 0.4 V into 3 V output signals. The power dissipation was 58 nW at 0.4-V and 10-kHz input pulse.","PeriodicalId":239979,"journal":{"name":"2011 Proceedings of the ESSCIRC (ESSCIRC)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2011.6044899","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11

Abstract

A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit has a distinctive feature in current generation scheme with logic error correction circuit by detecting input and output logic levels. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achieves low-power operation because it dissipates operating current only when the input signals change. Measurement results demonstrated that the circuit can convert low-voltage input signals of 0.4 V into 3 V output signals. The power dissipation was 58 nW at 0.4-V and 10-kHz input pulse.
一种带逻辑纠错电路的电平移位器,用于极低压数字CMOS lsi
本文提出了一种可用于极低压输入的电平移位电路。该电路在电流产生方案中具有独特的特点,通过检测输入和输出逻辑电平来进行逻辑纠错电路。该电路可以将低压输入数字信号转换为高压输出数字信号。该电路实现了低功耗工作,因为它只在输入信号改变时才耗散工作电流。测试结果表明,该电路可以将0.4 V的低压输入信号转换为3v的输出信号。在0.4 v和10 khz输入脉冲下,功耗为58 nW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信