A. Matsumoto, S. Sakiyama, Y. Tokunaga, T. Morie, S. Dosho
{"title":"Multiphase-Output Level Shift System used in Multiphase PLL for Low Power Application","authors":"A. Matsumoto, S. Sakiyama, Y. Tokunaga, T. Morie, S. Dosho","doi":"10.1109/VLSIC.2007.4342729","DOIUrl":null,"url":null,"abstract":"Low power design is essential for mobile application. For a PLL with multiphase outputs, level shifter (LS), which converts oscillator-output-level to that of power supply, consumes much power; hence, we have devised a new architecture called a multiphase-output level shift system (M-LSs) which has only three transistors in each LS and cuts off short current perfectly. Moreover, we have connected between the adjacent phases of M-LSs with a resistor to improve phase accuracy. The two key techniques mentioned above make power consumption 1/15 of the conventional LS. The PLL consumes about 1 mA at 123 MHz and accomplishes 63-phase accuracy of 0.5LSB.","PeriodicalId":261092,"journal":{"name":"2007 IEEE Symposium on VLSI Circuits","volume":"121 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2007.4342729","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Low power design is essential for mobile application. For a PLL with multiphase outputs, level shifter (LS), which converts oscillator-output-level to that of power supply, consumes much power; hence, we have devised a new architecture called a multiphase-output level shift system (M-LSs) which has only three transistors in each LS and cuts off short current perfectly. Moreover, we have connected between the adjacent phases of M-LSs with a resistor to improve phase accuracy. The two key techniques mentioned above make power consumption 1/15 of the conventional LS. The PLL consumes about 1 mA at 123 MHz and accomplishes 63-phase accuracy of 0.5LSB.