C. Parthasarathy, M. Denais, V. Huard, G. Ribes, E. Vincent, A. Bravaix
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引用次数: 1
Abstract
Assessment of design implications due to degradation of CMOS devices is increasingly required in the latest technologies. This paper discusses degradation due to channel hot carriers, NBTI and oxide breakdown from a design perspective - in terms of characterization, mechanisms and circuit analysis - introducing assessment of multiple degradation modes on same device