A Novel Seed Selection Algorithm for Test Time Reduction in BIST

Abstract

The seed (initial state) of a pseudo-random pattern generator (PRPG) for built-in self-test (BIST), significantly influences the fault coverage and total test application time. This paper introduces a one-pass seed selection algorithm, for any known PRPG. Due to its single-pass nature, unlike the state-of-the-art exhaustive search methods, the proposed algorithm is more time and memory efficient. Experimental results on ISCAS’85 and ISCAS’89 benchmark circuits, and synthetic SoCs built out of the combinational benchmarks, show considerable reduction in test length within comparable fault efficiencies, almost 100%, with respect to the existing methods.