{"title":"A Novel Partitioning Algorithm for Optimizing Neuron-to-Neuron Pathways through NoC in BMI","authors":"Jim Ng, T. Mak","doi":"10.1145/2685342.2685347","DOIUrl":null,"url":null,"abstract":"To study the complex interactions between neurons in a large-scale neural network and perform neural rehabilitation to restore the function of a damaged neural organ, an efficient interface and an underlying processing unit is to be developed to cope with the high demand of massive realtime signal processing. The combination of Micro-Electrode Array(MEA) and Network-on-Chip(NoC) makes it possible to build a powerful monitoring, signal relaying and stimulation simulation system. This Brain Machine Interface (BMI) system is able to capture, relay and response to neural signal in a biologically realistic way. To achieve this goal, the traffic in the NoC is managed in an efficient way to minimize the packet delay. Moreover, to raise the scalability of the system given the time delay constraint, a novel partitioning algorithm is presented to minimize the traffic generated. Existing partitioning algorithms can be used to archive this aim, but they are inefficient when applied to this novel scenario. The proposed partitioning algorithm is designed specifically for this scenario and thus is able to reduce the traffic generated in the NoC by 25% on average. The power consumption is also reduced significantly.","PeriodicalId":344147,"journal":{"name":"Network on Chip Architectures","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Network on Chip Architectures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2685342.2685347","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
To study the complex interactions between neurons in a large-scale neural network and perform neural rehabilitation to restore the function of a damaged neural organ, an efficient interface and an underlying processing unit is to be developed to cope with the high demand of massive realtime signal processing. The combination of Micro-Electrode Array(MEA) and Network-on-Chip(NoC) makes it possible to build a powerful monitoring, signal relaying and stimulation simulation system. This Brain Machine Interface (BMI) system is able to capture, relay and response to neural signal in a biologically realistic way. To achieve this goal, the traffic in the NoC is managed in an efficient way to minimize the packet delay. Moreover, to raise the scalability of the system given the time delay constraint, a novel partitioning algorithm is presented to minimize the traffic generated. Existing partitioning algorithms can be used to archive this aim, but they are inefficient when applied to this novel scenario. The proposed partitioning algorithm is designed specifically for this scenario and thus is able to reduce the traffic generated in the NoC by 25% on average. The power consumption is also reduced significantly.