{"title":"Low power video object motion-tracking architecture for very low bit rate online video applications","authors":"Wael Badawy, M. Bayoumi","doi":"10.1109/ICCD.2000.878333","DOIUrl":null,"url":null,"abstract":"This paper presents a low power VLSI architecture for video object motion-tracking that can be used in very low bit rate online video applications. Power has been reduced at both algorithmic and arithmetic levels. The video object motion-tracking architecture consists of two main parts, a mesh-based motion estimation unit and a mesh-based motion compensation unit. The mesh-based motion estimation unit implements parallel block matching motion estimation units to optimize the latency. The mesh-based motion compensation unit uses parallel multiplication-free affine core. The architecture has been prototyped and its performance measures have been evaluated. This processor can be used in online object-based video applications.","PeriodicalId":437697,"journal":{"name":"Proceedings 2000 International Conference on Computer Design","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2000 International Conference on Computer Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2000.878333","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents a low power VLSI architecture for video object motion-tracking that can be used in very low bit rate online video applications. Power has been reduced at both algorithmic and arithmetic levels. The video object motion-tracking architecture consists of two main parts, a mesh-based motion estimation unit and a mesh-based motion compensation unit. The mesh-based motion estimation unit implements parallel block matching motion estimation units to optimize the latency. The mesh-based motion compensation unit uses parallel multiplication-free affine core. The architecture has been prototyped and its performance measures have been evaluated. This processor can be used in online object-based video applications.