Jungho Jin, Youngbong Han, Byung-Il Kown, Iloh Jang, N. Lee, Seungbae Lee, Yuchul Hwang, Hoosung Kim, S. Pae
{"title":"Investigation on Board-Level CDM in SSD Products and Replication of Line ESD Phenomena","authors":"Jungho Jin, Youngbong Han, Byung-Il Kown, Iloh Jang, N. Lee, Seungbae Lee, Yuchul Hwang, Hoosung Kim, S. Pae","doi":"10.1109/IPFA55383.2022.9915752","DOIUrl":null,"url":null,"abstract":"Component-level charged device model (CDM) test method compliant with JS-002 is a good method to represent electro static discharge (ESD) failures of semiconductors. The CDM test method is useful to represent the ESD immunity of components constituting the system. However, there are factors that affect ESD immunity besides components in the system, it is important to verify ESD immunity in the system-level. In this paper, board-level CDM test method for solid state drives (SSDs) was proposed. This method can be used as a complementary method for system-level ESD test. A test environment suitable for SSD was set up using component-level CDM test equipment to reproduce ESD failure during assembly and test processes. The root-cause of the ESD failure is CDM damage caused by fast charge transfer between SSDs and adjacent objects. When SSD is combined with the equipment for electrical test, rapid charge transfer occurs through the metallic part of the SSD. A momentary voltage rise occurs at a specific node of semiconductors in SSD, and failure can be occurred. A failure of SSDs in assembly and test line was effectively replicated and root-cause identified and fixed.","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA55383.2022.9915752","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Component-level charged device model (CDM) test method compliant with JS-002 is a good method to represent electro static discharge (ESD) failures of semiconductors. The CDM test method is useful to represent the ESD immunity of components constituting the system. However, there are factors that affect ESD immunity besides components in the system, it is important to verify ESD immunity in the system-level. In this paper, board-level CDM test method for solid state drives (SSDs) was proposed. This method can be used as a complementary method for system-level ESD test. A test environment suitable for SSD was set up using component-level CDM test equipment to reproduce ESD failure during assembly and test processes. The root-cause of the ESD failure is CDM damage caused by fast charge transfer between SSDs and adjacent objects. When SSD is combined with the equipment for electrical test, rapid charge transfer occurs through the metallic part of the SSD. A momentary voltage rise occurs at a specific node of semiconductors in SSD, and failure can be occurred. A failure of SSDs in assembly and test line was effectively replicated and root-cause identified and fixed.