{"title":"Real-Time Image Collection and Processing System Design","authors":"Jing Gu, Yang Huayu","doi":"10.1109/IMCCC.2015.350","DOIUrl":null,"url":null,"abstract":"Using the structure of FPGA and DSP to achieve real-time image processing system, Preprocessing the camera data with FPGA running speed and parallel processing ability and compressing transmission image by DSP. In the process of the image data of the dark, using the logarithm stretching algorithm, Increasing the image enhancement module, the image brightness uneven distribution becomes clear. Using parallel JPEG to compress the block image data sent by FPGA with the strong advantage of processing complex algorithm by DSP. The experimental results show that image enhancement module can significantly improve the image quality and the structure of FPGA and DSP can well meet the real-time requirements.","PeriodicalId":438549,"journal":{"name":"2015 Fifth International Conference on Instrumentation and Measurement, Computer, Communication and Control (IMCCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Fifth International Conference on Instrumentation and Measurement, Computer, Communication and Control (IMCCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMCCC.2015.350","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Using the structure of FPGA and DSP to achieve real-time image processing system, Preprocessing the camera data with FPGA running speed and parallel processing ability and compressing transmission image by DSP. In the process of the image data of the dark, using the logarithm stretching algorithm, Increasing the image enhancement module, the image brightness uneven distribution becomes clear. Using parallel JPEG to compress the block image data sent by FPGA with the strong advantage of processing complex algorithm by DSP. The experimental results show that image enhancement module can significantly improve the image quality and the structure of FPGA and DSP can well meet the real-time requirements.