A novel synchronizer for a 17.9ps Nutt Time-to-Digital Converter implemented on FPGA

R. Machado, L. Rocha, J. Cabral
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引用次数: 0

Abstract

The evolution of Field-Programmable Gate Array (FPGA) technology triggered the appearance of FPGAs with higher operating frequencies and large number of resources. Simultaneously, the evolution of the FPGAs design tools has simplified the development process, reducing the time to market. These factors made FPGA platforms attractive for several applications, including time-of-flight applications that require the implementation of Time-to-Digital Converters (TDC). This work presents a Nutt TDC, based on a coarse counter and a Tapped Delay Line, with 17.9 picoseconds resolution and 5.4 LSB differential nonlinearity (DNL), implemented in a Xilinx Zynq-7000 FPGA, to be used on LiDAR applications and pull-in time measuring in MEMS accelerometers systems.
一种用于17.9ps纳特时间-数字转换器的同步器在FPGA上实现
现场可编程门阵列(FPGA)技术的发展促使具有更高工作频率和大量资源的FPGA出现。同时,fpga设计工具的发展简化了开发过程,缩短了上市时间。这些因素使得FPGA平台对一些应用具有吸引力,包括需要实现时间-数字转换器(TDC)的飞行时间应用。这项工作提出了一个基于粗计数器和抽头延迟线的Nutt TDC,具有17.9皮秒的分辨率和5.4 LSB的差分非线性(DNL),在Xilinx Zynq-7000 FPGA上实现,用于激光雷达应用和MEMS加速度计系统的拉入时间测量。
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