Analysis and diagnosis of multiple simultaneous defects

Abstract

In this paper, we present a new approach to diagnose multiple manufacturing defects affecting digital integrated circuits (IC). The method treats each failing pattern as an independent diagnosis, and finds out the location of potential candidates when they are simultaneously simulated explain each failing pattern. Our methodology consists in three main steps and can diagnose three types of multiple defect configurations. Experiments were performed in good ICs in which different types of multiple faults were injected. The correct fault locations and cause were predicted in all cases.