A hardware design for time delay estimation of TDOA

Qiang Li, W. Xia, Yanxiong Zhang, X. Jing, Zishu He
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引用次数: 2

Abstract

As Time difference of arrival (TDOA) needs high precision data for time delay estimation, a hardware system which can sample high precision data is presented in this paper. FPGA and DSP are taken as the general architecture in the hardware design. The precision of the system is improved by using GPS to synchronize time. The structure of the hardware system and the realization of data collection design flow are introduced. Finally, an estimation of time delay result by the cross correlation method will be given. Experiment results show the hardware design is effective and feasibility.
TDOA时延估计的硬件设计
针对到达时间差(TDOA)需要高精度数据进行时延估计的问题,本文提出了一种能够对高精度数据进行采样的硬件系统。在硬件设计中采用FPGA和DSP作为总体架构。采用GPS同步时间,提高了系统的精度。介绍了硬件系统的结构和数据采集设计流程的实现。最后给出了用互相关法估计时延的方法。实验结果表明了硬件设计的有效性和可行性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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