High Density Multilayer Substrate For Si On Si High Speed Module

M. Kimura, T. Shimoto, K. Matsui, K. Utsumi, T. Kusaka, T. Koike
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引用次数: 4

Abstract

In order to have high speed hardware, there are two approaches. One is to use high speed LSIs. The other is to reduce the mcdia dclay between LSIs. This paper describes the performance by a high density multilayer substrate, based on Si wafer for high speed module. The high density Si multilayer substrate consists of ground layer(Si wafer), power distribution layer(Al), two signal layers(Au), bonding pad(Ni/Au) and four dielectric layers. The signal layer has 20 pm/55 pm line and space. The dielectric layers are made of organic resin having low dielectric constant(e=3.0). Si substrate size is 43mn x 43mm. With high density Si multilayer substrate, thc authors have evaluated various mechanical and electrical characteristics. The adhesion between conduction llayer and organic insulator is excellent. The electric Characteristics (characteristic impedance, crosstalk noise and propagation delay time) are practical too. After mounting LSIs, which are TAB chips, on Si substrate, a high speed RISC chip module packaged 174 pin ceramic PGA has been fabricated. LSI packaging density is 34 % for high efficiency.
用于Si On Si高速模组的高密度多层基板
为了拥有高速硬件,有两种方法。一种是使用高速lsi。二是减少lsi之间的媒介间隔。本文介绍了一种基于硅晶片的高密度多层衬底用于高速模块的性能。高密度硅多层衬底由接地层(硅片)、功率分配层(Al)、两个信号层(Au)、键合垫(Ni/Au)和四个介电层组成。信号层有20pm / 55pm线路和空间。介质层由具有低介电常数(e=3.0)的有机树脂制成。Si衬底尺寸为43mn × 43mm。在高密度硅多层衬底上,作者评估了各种机械和电气特性。导电层与有机绝缘体之间的附着力良好。电学特性(特性阻抗、串扰噪声和传输延迟时间)也很实用。在Si衬底上安装lsi(即TAB芯片)后,制造出封装174引脚陶瓷PGA的高速RISC芯片模块。LSI封装密度为34%,效率高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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