M. Kimura, T. Shimoto, K. Matsui, K. Utsumi, T. Kusaka, T. Koike
{"title":"High Density Multilayer Substrate For Si On Si High Speed Module","authors":"M. Kimura, T. Shimoto, K. Matsui, K. Utsumi, T. Kusaka, T. Koike","doi":"10.1109/IEMT.1992.639919","DOIUrl":null,"url":null,"abstract":"In order to have high speed hardware, there are two approaches. One is to use high speed LSIs. The other is to reduce the mcdia dclay between LSIs. This paper describes the performance by a high density multilayer substrate, based on Si wafer for high speed module. The high density Si multilayer substrate consists of ground layer(Si wafer), power distribution layer(Al), two signal layers(Au), bonding pad(Ni/Au) and four dielectric layers. The signal layer has 20 pm/55 pm line and space. The dielectric layers are made of organic resin having low dielectric constant(e=3.0). Si substrate size is 43mn x 43mm. With high density Si multilayer substrate, thc authors have evaluated various mechanical and electrical characteristics. The adhesion between conduction llayer and organic insulator is excellent. The electric Characteristics (characteristic impedance, crosstalk noise and propagation delay time) are practical too. After mounting LSIs, which are TAB chips, on Si substrate, a high speed RISC chip module packaged 174 pin ceramic PGA has been fabricated. LSI packaging density is 34 % for high efficiency.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1992.639919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In order to have high speed hardware, there are two approaches. One is to use high speed LSIs. The other is to reduce the mcdia dclay between LSIs. This paper describes the performance by a high density multilayer substrate, based on Si wafer for high speed module. The high density Si multilayer substrate consists of ground layer(Si wafer), power distribution layer(Al), two signal layers(Au), bonding pad(Ni/Au) and four dielectric layers. The signal layer has 20 pm/55 pm line and space. The dielectric layers are made of organic resin having low dielectric constant(e=3.0). Si substrate size is 43mn x 43mm. With high density Si multilayer substrate, thc authors have evaluated various mechanical and electrical characteristics. The adhesion between conduction llayer and organic insulator is excellent. The electric Characteristics (characteristic impedance, crosstalk noise and propagation delay time) are practical too. After mounting LSIs, which are TAB chips, on Si substrate, a high speed RISC chip module packaged 174 pin ceramic PGA has been fabricated. LSI packaging density is 34 % for high efficiency.