Design of self-parity combinational circuits for self-testing and on-line detection

Abstract

It is shown that an arbitrary n-tupel of M-ary Boolean functions can be systematically implemented as a self-testing combinational circuit. This is achieved by the use of a parity bit and of one or more replicates of a selected part of the monitored circuit. The party bit and the functional bits are thus jointly designed rather than in separation. The circuit is then called a self-parity circuit. In comparison to a separate implementation of a parity prediction function, the hardware costs can be significantly reduced. The circuit can be used in test mode and in normal operation mode for online fault detection. In normal online operation, faults may be detected with some degree of latency.