June Lee, Sungsoo Lee, O. Kwon, Kyeong-Han Lee, Kyongjoo Lee, D. Byeon, In-young Kim, Y. Lim, Byung-Soon Choi, Jong-Sik Lee, W. Shin, Jeong-Hyuk Choi, K. Suh
{"title":"A 1.8 V 2 Gb NAND flash memory for mass storage applications","authors":"June Lee, Sungsoo Lee, O. Kwon, Kyeong-Han Lee, Kyongjoo Lee, D. Byeon, In-young Kim, Y. Lim, Byung-Soon Choi, Jong-Sik Lee, W. Shin, Jeong-Hyuk Choi, K. Suh","doi":"10.1109/ISSCC.2003.1234306","DOIUrl":null,"url":null,"abstract":"A 1.8 V 2 Gb NAND flash memory is fabricated in a 90 nm process resulting in a 141 mm/sup 2/ die and a 0.044 /spl mu/m/sup 2/ effective cell. To achieve the high level of integration, critical layers are patterned with KF photolithography and phase-shift masks with proximity correction.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2003.1234306","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
A 1.8 V 2 Gb NAND flash memory is fabricated in a 90 nm process resulting in a 141 mm/sup 2/ die and a 0.044 /spl mu/m/sup 2/ effective cell. To achieve the high level of integration, critical layers are patterned with KF photolithography and phase-shift masks with proximity correction.