A 24Mb/s radix-4 logMAP turbo decoder for 3GPP-HSDPA mobile wireless

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI:10.1109/ISSCC.2003.1234244

M. Bickerstaff, Linda Davis, Charles Thomas, David Garrett, Chris Nicol

引用次数: 147

Abstract

A 24Mb/s 3GPP-HSDPA radix-4 logMAP turbo decoder is designed for 3G data terminals. It features an approximate radix-4 logsum circuit to achieve 145MHz operation. Power is reduced using 1/2-iteration early termination and extrinsics are interleaved in companded format. The decoder core is 14.5mm/sup 2/ in 0.18/spl mu/m CMOS.

查看原文本刊更多论文

用于3GPP-HSDPA移动无线的24Mb/s基数-4 logMAP turbo解码器

为3G数据终端设计了24Mb/s 3GPP-HSDPA radix-4 logMAP turbo解码器。它具有近似的基数-4对数电路，可实现145MHz的操作。使用1/2迭代的早期终止降低了功率，并且外部器件以压缩格式交错。解码器核心为14.5mm/sup 2/ 0.18/spl mu/m CMOS。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

自引率

0.00%

发文量