An efficient reversible cryptographic circuit design

Abstract

Hardware cryptographic circuits emerge in the field of cryptography as an alternative of software rendition where the analysis of the dissipated power causes the major attacks like DPA and SPA which are formally executed on the classical circuits. The paper proposes a novel design of cryptographic circuit based on the popular RSA algorithm using fast Modular Multiplier designed with reversible logic gates. The proposed structure is simple and regular as almost all the same component sets repeat itself throughout the design. The quantum cost of the proposed circuit is significantly less as compared to previous works done so far.