Stress enhancement concept on replacement gate technology with top-cut stress liner for nFETs

Abstract

Electron mobility enhancement using a top-cut stress liner and the replacement gate process is demonstrated and the concept of stress localization is proposed, for the first time. Eliminating a dummy gate after tensile stress liner formation enhances lateral stress at the channel region and achieves good mobility improvement. A detailed analysis using stress and mobility calculation based on a band model is performed. It is found that this new mobility enhancement technology has potential advantages in the shorter gate length region in comparison with the conventional gate-first process.