Design of a voltage comparator using for switching regulator

Yuanjie Bin, F. Quanyuan
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Abstract

In this paper, a comparator used for switching regulator is presented. This design uses a bias stage with the structure of negative feedback to get more stable DC bias voltages. The comparator is formed by 3 stages: input stage, a emitter coupled differential pair; middle stage, a folded cascode amplifier and output stage be consisted by a Active Load Inverter. These simulation result shown in this paper is got by Hspice with a 0.6 um CMOS technologies and 3.6 V power supply.
用于开关稳压器的电压比较器的设计
本文介绍了一种用于开关稳压器的比较器。本设计采用负反馈结构的偏置级,以获得更稳定的直流偏置电压。所述比较器由3级组成:输入级、射极耦合差分对;中间级为折叠级联放大器,输出级由有源负载逆变器组成。本文所示的仿真结果是通过Hspice采用0.6 um CMOS技术和3.6 V电源得到的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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