An Oversampling Adc With Non-linear Quantizer For Pcm-codec

S. Sakiyama, S. Dosho, M. Maruyama, G. Hayashi, S. Inagaki, T. Moriiwa, M. Matsushita, K. Mochizuki, S. Ito
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引用次数: 1

Abstract

This piper clescrihes rtri overxinipling cinnlog-io-digitctl converter (ADC) suiirible for PCM codecs. Non-linear 5-level quctrttiier is iiiipleiiwiied to the itoise-s/iaping modulator. This ADC cun sciti.$fi the specifications of CCITT G. 712. in .siii/e of using ,firs[ order delta-siRma irioddrttor rinc/'reniiie.s low xwer opemfiori. This clrip is fdJriccitcd in O.t+iii dou/i/e-po/y (im/ dr,uL/e-rnetci[ CMOS lirocess orid occupies clrip urefi of 1Snim2. The ruri.riinuni power consurnpiion is 12.8m W with u single +3Vporver supply iwludirig DAC ciml TONE genercttor. INTHODUCTION Oversampling ADCs and DACs usin second order delta-sigma modulatorsl) or interpolation modulators8 have been developed for applying PCM codecs along with the progress of VLSI technology. However. the second order delta-sigma modulator requires sever specifications",, for SCF circuits such as high low-frequency open-loop voltage gain over 70dB for each operational amplifiers, small settling error lower than O.S%, and small relative enor of capacitors less than 0.2%. Hence it is difficult to realize operational amplifiers satisfying these severe specifications with low power consumption. The interpolation modulator needs the local DAC having 7b equivalent precision and it causes large area of analog circuits compared with other oversampling techniques. Thus we have proposed a new conversion scheme of ADC suitable for PCM codecs with paying attention to the SNR specifications defined as CCITT G.7 12. As a result, it can satisfy the needed SNR by introducing the non-linear S-level quantizer, in spite of using the first order delta-sigma modulator.
用于pcm编解码器的非线性量化器过采样Adc
本文介绍了一种适用于PCM编解码器的三倍倍线性对数-数字转换器(ADC)。将非线性五电平刻度器连接到单频/单频调制器上。这个ADC是科学的。$fi CCITT G. 712的规格。在使用一阶delta- sima的情况下,一阶delta- sima是一阶delta- sima。这是一个很低的答案。这个clrip fdJriccitcd职能治疗师+三世窦/我/ e-po / y (im /博士,uL / e-rnetci [CMOS lirocess orid占据clrip urefi 1 snim2。ruri。整机功耗为128m W,单台+ 3v电源,包括DAC和TONE发电机。随着超大规模集成电路技术的进步,用于PCM编解码器的过采样adc和二阶δ - σ调制器或插值调制器已被开发出来。然而。二阶δ - σ调制器对SCF电路有严格的要求,如每个运算放大器的高低频开环电压增益大于70dB,沉降误差小于os %,电容器的相对误差小于0.2%。因此,实现满足这些严格要求的低功耗运算放大器是很困难的。插值调制器需要具有7b等效精度的本地DAC,与其他过采样技术相比,它会造成较大的模拟电路面积。因此,我们提出了一种新的ADC转换方案,适用于PCM编解码器,并注意CCITT G.7 12定义的信噪比规范。结果表明,尽管使用一阶δ - σ调制器,但通过引入非线性s级量化器可以满足所需的信噪比。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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