Emulation of a Multi-Stage Differential Amplifier Using one Single-Ended Device-Under-Test

Abstract

A method to emulate multi-stage power amplifier (PA) architectures is presented. The technique predicts multistage PA performance. The method is based on an iterative procedure using transistor/branch PA active load-pull measurements to include inter-stage interaction. As a benefit, real-world performance of a multi-stage PA can be evaluated early in the design process. Compared to previous published work, the method requires only a single representative device-undertest to embody multi-stage architectures. Thus, a compelling measurement method for PA designers is presented. The method is demonstrated by emulating a two-stage differential amplifier at 2.14 GHz using single-tone signals.