{"title":"A Single-Temperature-Calibration 0.18-µm CMOS Time-Based Resistive Sensor Interface with Low Drift over a −40°C to 175°C Temperature Range","authors":"Jorge Marin, E. Sacco, Johan Vergauwen, G. Gielen","doi":"10.1109/ESSCIRC.2018.8494288","DOIUrl":null,"url":null,"abstract":"This paper presents a very-low-drift 0.181µ m CMOS time-based resistive-bridge sensor interface. It exhibits only 3.8 ppm/° C gain drift and 0.3 ppm/°C offset drift for the entire −40°C to 175°C temperature range using a single-temperature calibration scheme and no external accurate references nor components. The interface provides a 15 ENOB for a 100ms conversion time, consuming 3.41mW of power and 0.26mm2 of active area. The holistic drift-resilience strategy combines time-based chopping and VCO tuning to remove the DC and low-frequency errors introduced by VCO nonidealities and drift.","PeriodicalId":355210,"journal":{"name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2018.8494288","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a very-low-drift 0.181µ m CMOS time-based resistive-bridge sensor interface. It exhibits only 3.8 ppm/° C gain drift and 0.3 ppm/°C offset drift for the entire −40°C to 175°C temperature range using a single-temperature calibration scheme and no external accurate references nor components. The interface provides a 15 ENOB for a 100ms conversion time, consuming 3.41mW of power and 0.26mm2 of active area. The holistic drift-resilience strategy combines time-based chopping and VCO tuning to remove the DC and low-frequency errors introduced by VCO nonidealities and drift.