{"title":"Reconfigurable FPGA's in the 1-20 GHz band with HBT BiCMOS","authors":"J. McDonald, B. Goda","doi":"10.1109/EH.1999.785452","DOIUrl":null,"url":null,"abstract":"This paper describes the operation of a field Programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (HBT) version of the Xilinx 6200 FPGA. A new proposed device would be bitwise compatible with the 6200, but would operate in the 1-20 GHz range due to the HBT technology being used for the logic and routing and CMOS for storing the configuration bits. This is possible due to the IBM cointegration process of a HBT with a BiCMOS process. Information in this paper is based on an HBT having a f/sub T/ of 50 GHz, but later in 1999 IBM will be unveiling a process that will double the speed. By replacing and redesigning key parts of the 6200 FPGA, a 100-200X operating speedup is possible. The core logic cell in the 6200 consists of two input multiplexers and nip-flops, which can easily be converted to current mode logic (CML). Routing in a conventional FPGA is done via pass transistors, which can act like a low pass filter for a high-speed signal. A SiGe HBT CML multiplexer can be used for routing which can pass signals with a 12-14 picoseconds delay. Through the use of a side decoder, memory planes of configuration could be used to store current and future configurations. Interchange could occur between memory planes if the old flip-flop values are stored, new flip-flop values are restored, and then the new configuration plane is activated. Countless applications such as DSP, Ethernet routing, missile control, and artificial intelligence could utilize a SiGe HBT FPGA.","PeriodicalId":234639,"journal":{"name":"Proceedings of the First NASA/DoD Workshop on Evolvable Hardware","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the First NASA/DoD Workshop on Evolvable Hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EH.1999.785452","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This paper describes the operation of a field Programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (HBT) version of the Xilinx 6200 FPGA. A new proposed device would be bitwise compatible with the 6200, but would operate in the 1-20 GHz range due to the HBT technology being used for the logic and routing and CMOS for storing the configuration bits. This is possible due to the IBM cointegration process of a HBT with a BiCMOS process. Information in this paper is based on an HBT having a f/sub T/ of 50 GHz, but later in 1999 IBM will be unveiling a process that will double the speed. By replacing and redesigning key parts of the 6200 FPGA, a 100-200X operating speedup is possible. The core logic cell in the 6200 consists of two input multiplexers and nip-flops, which can easily be converted to current mode logic (CML). Routing in a conventional FPGA is done via pass transistors, which can act like a low pass filter for a high-speed signal. A SiGe HBT CML multiplexer can be used for routing which can pass signals with a 12-14 picoseconds delay. Through the use of a side decoder, memory planes of configuration could be used to store current and future configurations. Interchange could occur between memory planes if the old flip-flop values are stored, new flip-flop values are restored, and then the new configuration plane is activated. Countless applications such as DSP, Ethernet routing, missile control, and artificial intelligence could utilize a SiGe HBT FPGA.