Proceedings of the First NASA/DoD Workshop on Evolvable Hardware最新文献

Prototyping a GA Pipeline for complete hardware evolution 为完整的硬件进化设计一个GA管道原型

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785431

G. Tufte, P. Haddow

引用次数: 67

Artificial evolution of active filters: a case study 有源滤波器的人工进化:一个案例研究

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785436

R. Zebulum, M. Pacheco, M. Vellasco

引用次数: 47

Genetically engineered microelectronic infrared filters 基因工程微电子红外滤光片

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785459

T. Cwik, Gerhard Klimeck

引用次数: 1

The hundred year spacecraft 百年宇宙飞船

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785458

A. Avizienis

引用次数: 17

On-line evolution of FPGA-based circuits: a case study on hash functions 基于fpga电路的在线演化:以哈希函数为例

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785432

E. Damiani, A. Tettamanzi, V. Liberali

引用次数: 17

Adaptive networks with self-organizing multi-hop links 自组织多跳链路的自适应网络

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785446

P. Davis

引用次数: 7

Evolutionary experiments with a fine-grained reconfigurable architecture for analog and digital CMOS circuits 进化实验与细粒度可重构架构的模拟和数字CMOS电路

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785437

A. Stoica, D. Keymeulen, R. Tawel, C. Salazar-Lazaro, Wei-Te Li

{"title":"Evolutionary experiments with a fine-grained reconfigurable architecture for analog and digital CMOS circuits","authors":"A. Stoica, D. Keymeulen, R. Tawel, C. Salazar-Lazaro, Wei-Te Li","doi":"10.1109/EH.1999.785437","DOIUrl":"https://doi.org/10.1109/EH.1999.785437","url":null,"abstract":"The paper describes the architectural details of a fine-grained programmable transistor array (PTA) architecture and illustrates its use in evolutionary experiments on the synthesis of both analog and digital circuits. A PTA chip was built in CMOS to allow circuits obtained through evolutionary design using a simulated PTA to be immediately deployed and validated in hardware and, moreover, enables a benchmarking and comparison of evolutions carried out via simulations only (extrinsic evolution) with the chip-in-the-loop (intrinsic) evolutions. The evolution of an analog computational circuit and a logical inverter are presented. Synthesis by software evolution found several potential solutions satisfying the a priori constraints, however, only a fraction of these proved valid when ported to the hardware. The circuits evolved directly in hardware proved stable when ported to different chips. In either case, both software and hardware experiments indicate that evolution can be accelerated when gray-scale (as opposed to binary switches) were used to define circuit connectivity. Overall, only evolution directly in hardware appears to guarantee a valid solution.","PeriodicalId":234639,"journal":{"name":"Proceedings of the First NASA/DoD Workshop on Evolvable Hardware","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125520512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 59

On the filtering properties of evolved gate arrays 演化门阵列滤波特性研究

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785429

J. Miller

引用次数: 36

Evolvable hardware or learning hardware? induction of state machines from temporal logic constraints 可进化硬件还是可学习硬件?从时序逻辑约束中归纳状态机

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785444

M. Perkowski, A. Mishchenko, A. N. Chebotarev

引用次数: 12

"Genetically engineered" nanoelectronics “基因工程”纳米电子学

Proceedings of the First NASA/DoD Workshop on Evolvable Hardware Pub Date : 1999-07-19 DOI: 10.1109/EH.1999.785460

Gerhard Klimeck, C. Salazar-Lazaro, A. Stoica, T. Cwik

{"title":"\"Genetically engineered\" nanoelectronics","authors":"Gerhard Klimeck, C. Salazar-Lazaro, A. Stoica, T. Cwik","doi":"10.1109/EH.1999.785460","DOIUrl":"https://doi.org/10.1109/EH.1999.785460","url":null,"abstract":"The quantum mechanical functionality of nanoelectronic devices such as resonant tunneling diodes (RTDs), quantum well infrared photodetectors (QWIPs), quantum well lasers, and heterostructure field effect transistors (HFETs) is enabled by material variations on an atomic scale. The design and optimization of such devices requires a fundamental understanding of electron transport in such dimensions. The nanoelectronic modeling tool (NEMO) is a general-purpose quantum device design and analysis tool based on a fundamental non-equilibrium electron transport theory. NEMO was combined with a parallelized genetic algorithm package (PGAPACK) to evolve structural and material parameters to match a desired set of experimental data. A numerical experiment that evolves structural variations such as layer widths and doping concentrations is performed to analyze an experimental current voltage characteristic. The genetic algorithm is found to drive the NEMO simulation parameters close to the experimentally prescribed layer thicknesses and doping profiles. With such a quantitative agreement between theory and experiment design synthesis can be performed.","PeriodicalId":234639,"journal":{"name":"Proceedings of the First NASA/DoD Workshop on Evolvable Hardware","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129204413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6