A new generation of power semiconductor packaging paves the way for higher efficiency power conversion

Abstract

Power Semiconductor packaging has been saddled with five key complaints since the advent of the solid state transistor; (1) packages have too much resistance, (2) they have too much inductance, (3) they take up too much space, (4) they have poor thermal properties that limit heat extraction, and (5) they cost too much. In 2010 enhancement mode gallium nitride power transistors were introduced without a surrounding plastic package. The unique characteristics of the lateral GaN-on-silicon transistors enable the active devices to be protected from the normal environmental abuses without a cumbersome molded plastic package. These chipscale packages, with a Land Grid Array (LGA) format, eliminate the parasitic inductance and resistance of the semiconductor package as well as the space occupied by a conventional package. In this paper we quantify the advantages of chipscale packaging in these five areas of complaint and show how system performance benefits in high frequency DC-DC conversion.