High Input Impedance Capacitively-coupled Neural Amplifier and Its Boosting Principle

Abstract

This article proposes a technique for increasing the input impedance of conventional capacitively-coupled neural amplifiers based on careful examination of its analytical model. Following the precise derivation of the input impedance model, the effect of a negative capacitor is exploited as boosting principle to the input impedance of capacitively-coupled neural amplifiers. In order to implement this negative capacitor, some modifications were made to the conventional structure to make them suitable for capacitively-coupled neural amplifiers. The boosting factor which is calculated after these modifications exhibits frequency dependant parameters which offers further flexibility in the design and tuning. The proposed method to improve the input impedance is tested through simulation in a commercially available 0.18 µm CMOS technology. The robustness of the proposed structure is tested through Monte Carlo simulation in the presence of mismatch and process variation. Although the input impedance dropped with a factor of 2 during Monte Carlo simulations, the proposed method can still boost the input impedance by a factor of 100 at 100 Hz. While the proposed method might increase the area consumption, it maintains power efficiency property. When the proposed neural amplifier is compared to the state-of-the-art in terms of noise, power and input impedance, it shows relatively higher input impedance with negligible effect on input referred noise and power consumption which makes this structure suitable for low-power applications.