Simulation to study the effect of variation of oxide thickness and substrate doping on DIBL in MOSFET

Abstract

In this work, the Drain Induced Barrier Lowering is studied as the function of oxide thickness and substrate doping. The effects are verified simulating with TCAD Sentaurus toolkit. High-K dielectric material is used in place of SiO2. Also investigation of the effect of change in substrate doping on Drain Induced Barrier Lowering is studied.