A Short Review on Graphene Nanoribbon Interconnect

Abstract

On-chip VLSI interconnects is considered very promising area in the field of IC design in recent years. The delay of interconnect system becomes pre-dominant than the on-chip transistor gate delay in ultra large scale integration due to the substantial parasitic effects. Further the increase in Joule heating and significant increase of grain boundary scattering posed a harsh challenge for future technologies. Subsequently the VLSI industry started a searching the alternative of conventional copper interconnect to get rid of these issues. Here the surprise innovation, graphene, came in picture. Graphene is the material with high electron mobility and high mean free path, so the high current density and lowest resistivity. For interconnect application, due to lower resistivity, graphene nano ribbon (GNR), further multi-layer GNR (MLGNR) has been considered to the most suitable for nano-interconnect application. Further intercalation doping improves the conductivity for MLGNR interconnect. This article demonstrates the basic structural properties and depicts the electrical models of single and multi-layer and intercalation doped GNR. A preliminary discussion on production methods for structuring pristine and intercalated GNR interconnect has also been discussed in this article.